Encore SIM EDITOR SOFTWARE Guia do Utilizador descarregar pdf (Página 61)

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Getting Started

+define+macro=value+

Defines a text macro in your source code to a value or character

string. You can test for this definition in your Verilog source code

using the ‘ifdef compiler directive.

-f filename

Specifies a file name that contains a list of absolute pathnames

for Verilog source files and compile-time options.

+incdir+directory

Specifies the directory or directories that VCS searches for include

files used in the `include compiler directive. More than one

directory may be specified, separated by +.

-I

Compiles for interactive use and instructs VCS to automatically

include +cli (command line interface), -P virsims.tab

(default VirSim PLI table), and -lm (math library). This option

enables the use of system tasks for writing VCD+ files for post-

processing in VirSim.

-line

Enables source-level debugging tasks such as stepping through

the code, displaying the order in which VCS executed lines in your

code, and displaying the last statement executed before

simulation stopped.

-l filename

Specifies a file where VCS records compilation messages. If you

also enter the -R or -RI option, VCS records messages from both

compilation and simulation in the same file.

+nospecify

Suppresses module path delays and timing checks in specify

blocks. This option can significantly improve simulation

performance.

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Encore SIM EDITOR SOFTWARE Guia do Utilizador Página 61